ASIC Verification engineer (Mays Landing)

Compensation

: $107,370.00 - $160,070.00 /year *

Employment Type

: Full-Time

Industry

: Engineering



Role: ASIC Verification Engineer

Location: Rockleigh, New Jersey

Duration: Full time

Roles & Responsibilities:

  • Complete verification services, from test plan documentation/architecture to silicon tape out
  • Understanding functionality/complexity - Module Verification, Test Vector Generation, Radom Stress testing

Competencies:

  • Minimum 5 Years Experience in ASIC Simulation in a Synopsys Environment
  • Minimum 5 Years Experience in Verilog/System Verilog Test Bench Design
  • Able to work at Rockleigh, NJ

Preferred:

  • HDMI Video Experience a plus
  • Digital Audio Experience a plus
  • Ethernet Experience a plus
  • UVM/OVM Experience a plus
- provided by Dice
Associated topics: assembly language, circuit, embedded, firmware engineer, gpu, msee, pcb, smt, ttl, xilinx * The salary listed in the header is an estimate based on salary data for similar jobs in the same area. Salary or compensation data found in the job description is accurate.

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